/*
 * Copyright (c) 2022, IMMORTA Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * - Redistributions of source code must retain the above copyright notice, this list
 *   of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright notice, this
 *   list of conditions and the following disclaimer in the documentation and/or
 *   other materials provided with the distribution.
 *
 * - Neither the name of IMMORTA Inc. nor the names of its
 *   contributors may be used to endorse or promote products derived from this
 *   software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef FLASH_REG_ACCESS_H
#define FLASH_REG_ACCESS_H

/*!
 * @file flash_reg_access.h
 * @brief This file declares or defines flash register access functions
 */

/*******Includes***************************************************************/
#include "flash_drv.h"

/*******Definitions************************************************************/
#if (CONFIG_FLASH_NUMBER_OF_CACHE == 1U)
#define FLASH_CFGR_CACHEEN(x) (((uint32_t)(((uint32_t)(x))<<FLASH_CFGR_CACHEEN_Pos)) & FLASH_CFGR_CACHEEN_Msk)
#else
#define FLASH_CFGR_PCACHEEN(x) (((uint32_t)(((uint32_t)(x))<<FLASH_CFGR_PCACHEEN_Pos)) & FLASH_CFGR_PCACHEEN_Msk)
#define FLASH_CFGR_DCACHEEN(x) (((uint32_t)(((uint32_t)(x))<<FLASH_CFGR_DCACHEEN_Pos)) & FLASH_CFGR_DCACHEEN_Msk)
#define FLASH_CFGR_PPREEN(x)   (((uint32_t)(((uint32_t)(x))<<FLASH_CFGR_PPREEN_Pos)) & FLASH_CFGR_PPREEN_Msk)
#define FLASH_CFGR_DPREEN(x)   (((uint32_t)(((uint32_t)(x))<<FLASH_CFGR_DPREEN_Pos)) & FLASH_CFGR_DPREEN_Msk)
#endif

#define FLASH_UNLOCK_KEY1                              (0x76543210U)
#define FLASH_UNLOCK_KEY2                              (0xFEDCBA98U)

#if (CONFIG_FLASH_READ_PROTECT_FEATURE == 1U)
#define FLASH_ERROR_FLAG_MASK                          (0xE2U)
#else
#define FLASH_ERROR_FLAG_MASK                          (0xC2U)
#endif

#if (CONFIG_FLASH_CHIP_MULTI_MASTER == 1U)
#define FLASH_MASTER_ACCESS_CONTROL_KEY                (0x5A1234A5U)
#define FLASH_HOST_CORE_MASTER_ID                      (0x2U)
#endif

/*******APIs*******************************************************************/

#if defined(__cplusplus)
extern "C" {
#endif

#if (CONFIG_FLASH_CHIP_MULTI_MASTER == 1U)
/*!
 * @brief Safety unlock flash control
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_SafetyUnlock(FLASH_Type* regBase)
{
    uint32_t timeout = 0x1000;

    regBase->CCR = 0U;
    regBase->ADDR = 1U;
    regBase->SR = 1U;

    while (((regBase->SR & FLASH_SR_CCF_Msk) == 0U) && (timeout > 0U)) {
        timeout--;
    }

    regBase->SR = 0xE2U;
}

/*!
 * @brief Get control of flash controller
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_GetControlOfFlashController(FLASH_Type* regBase)
{
    regBase->MACR = FLASH_MASTER_ACCESS_CONTROL_KEY;
}

/*!
 * @brief Is the host of the current operation is host cpu
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline bool FLASH_REG_IsHostCpuOperation(FLASH_Type* regBase)
{
    return (((regBase->LCSR & FLASH_LCSR_MID_Msk) >> FLASH_LCSR_MID_Pos) == FLASH_HOST_CORE_MASTER_ID);
}
#endif

/*!
 * @brief Safety lock flash control
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_SafetyLock(FLASH_Type* regBase)
{
#if (CONFIG_FLASH_CHIP_MULTI_MASTER == 1U)
    regBase->MACR = FLASH_MASTER_ACCESS_CONTROL_KEY;
#endif

    regBase->DATAH = 0xFFFFFFFFU;
    regBase->DATAL = 0xFFFFFFFFU;
}

/*!
 * @brief Unlock pflash
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_UnlockPflash(FLASH_Type* regBase)
{
    regBase->PKEY = FLASH_UNLOCK_KEY1;
#if (CONFIG_FLASH_UNLOCK_TWO_SEQUENCES == 1U)
    regBase->PKEY = FLASH_UNLOCK_KEY2;
#endif
}

/*!
 * @brief Unlock dflash
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_UnlockDflash(FLASH_Type* regBase)
{
    regBase->DKEY = FLASH_UNLOCK_KEY1;
#if (CONFIG_FLASH_UNLOCK_TWO_SEQUENCES == 1U)
    regBase->DKEY = FLASH_UNLOCK_KEY2;
#endif
}

/*!
 * @brief Unlock option byte
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_UnlockOptionByte(FLASH_Type* regBase)
{
    regBase->OKEY = FLASH_UNLOCK_KEY1;
#if (CONFIG_FLASH_UNLOCK_TWO_SEQUENCES == 1U)
    regBase->OKEY = FLASH_UNLOCK_KEY2;
#endif
}

/*!
 * @brief Lock pflash
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_LockPflash(FLASH_Type* regBase)
{
    regBase->LCSR = regBase->LCSR & (~FLASH_LCSR_PLCS_Msk);
}

/*!
 * @brief Lock dflash
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_LockDflash(FLASH_Type* regBase)
{
    regBase->LCSR = regBase->LCSR & (~FLASH_LCSR_DLCS_Msk);
}

/*!
 * @brief Lock option byte
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_LockOptionByte(FLASH_Type* regBase)
{
    regBase->LCSR = regBase->LCSR & (~FLASH_LCSR_OLCS_Msk);
}

/*!
 * @brief Get the command completion flag
 *
 * @param[in] regBase: The flash register base address
 * @return flag(true or false)
 */
static inline bool FLASH_REG_GetCmdCompleteFlag(FLASH_Type* regBase)
{
    return (bool)((regBase->SR & FLASH_SR_CCF_Msk) >> FLASH_SR_CCF_Pos);
}

/*!
 * @brief Get the command access error flag
 *
 * @param[in] regBase: The flash register base address
 * @return flag(true or false)
 */
static inline bool FLASH_REG_GetCmdAccessErrFlag(FLASH_Type* regBase)
{
    return (bool)((regBase->SR & FLASH_SR_ACCERR_Msk) >> FLASH_SR_ACCERR_Pos);
}

/*!
 * @brief Get the command completion error flag
 *
 * @param[in] regBase: The flash register base address
 * @return flag(true or false)
 */
static inline bool FLASH_REG_GetCmdCompletionErrFlag(FLASH_Type* regBase)
{
    return (bool)((regBase->SR & FLASH_SR_CMDERR_Msk) >> FLASH_SR_CMDERR_Pos);
}

#if (CONFIG_FLASH_READ_PROTECT_FEATURE == 1U)
/*!
 * @brief Get the read protection error flag
 *
 * @param[in] regBase: The flash register base address
 * @return flag(true or false)
 */
static inline bool FLASH_REG_GetReadProtectionErrFlag(FLASH_Type* regBase)
{
    return (bool)((regBase->SR & FLASH_SR_RPVIO_Msk) >> FLASH_SR_RPVIO_Pos);
}

/*!
 * @brief Get read protection status
 *
 * @param[in] regBase: The flash register base address
 * @return read protection status(true or false)
 */
static inline bool FLASH_REG_GetReadStatus(FLASH_Type* regBase)
{
    return (bool)((regBase->RPS & FLASH_RPS_RPS_Msk) >> FLASH_RPS_RPS_Pos);
}

/*!
 * @brief Clear read protection err flag
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearReadProtectionErrFlag(FLASH_Type* regBase)
{
    regBase->SR = FLASH_SR_RPVIO_Msk;
}
#elif (CONFIG_FLASH_DEBUG_PROTECT_FEATURE == 1U)
/*!
 * @brief Get debug protection status
 *
 * @param[in] regBase: The flash register base address
 * @return debug protection status(true or false)
 */
static inline bool FLASH_REG_GetDebugStatus(FLASH_Type* regBase)
{
    return (bool)((regBase->DBGPR & FLASH_DBGPR_DBGAUTS_Msk) >> FLASH_DBGPR_DBGAUTS_Pos);
}

/*!
 * @brief Input debug key
 *
 * @param[in] regBase: The flash register base address
 * @param[in] debugKey: The key of user input
 * @return None
 */
static inline void FLASH_REG_AuthenticateDebugKey(FLASH_Type* regBase, flash_debug_auth_key_t debugKey)
{
    regBase->DBGKEY0 = debugKey.key0;
    regBase->DBGKEY1 = debugKey.key1;
    regBase->DBGKEY2 = debugKey.key2;
    regBase->DBGKEY3 = debugKey.key3;
    regBase->DBGKEY4 = debugKey.key4;
    regBase->DBGKEY5 = debugKey.key5;
    regBase->DBGKEY6 = debugKey.key6;
    regBase->DBGKEY7 = debugKey.key7;

    regBase->DBGPR = FLASH_DBGPR_DBGAUT_Msk;
}
#endif

#if (CONFIG_FLASH_AB_SWAP_FEATURE == 1U)
/*!
 * @brief Get A/B swap enable status
 *
 * @param[in] regBase: The flash register base address
 * @return A/B swap enable status(true or false)
 */
static inline bool FLASH_REG_GetAbSwapEnableStatus(FLASH_Type* regBase)
{
    return (bool)((regBase->ABSSR & FLASH_ABSSR_SWAPEN_Msk) >> FLASH_ABSSR_SWAPEN_Pos);
}

/*!
 * @brief Is pflash is swapping
 *
 * @param[in] regBase: The flash register base address
 * @return true or false
 */
static inline bool FLASH_REG_IsPflahSwapping(FLASH_Type* regBase)
{
    return (bool)((regBase->ABSSR & FLASH_ABSSR_SWAPSEL_Msk) >> FLASH_ABSSR_SWAPSEL_Pos);
}
#endif

/*!
 * @brief Get the write protection error flag
 *
 * @param[in] regBase: The flash register base address
 * @return flag(true or false)
 */
static inline bool FLASH_REG_GetWriteProtectionErrFlag(FLASH_Type* regBase)
{
    return (bool)((regBase->SR & FLASH_SR_WPVIO_Msk) >> FLASH_SR_WPVIO_Pos);
}

/*!
 * @brief Start flash command
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_StartFlashCmd(FLASH_Type* regBase)
{
    regBase->SR = FLASH_SR_CCF_Msk;
}

/*!
 * @brief Clear command access err flag
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearCmdAccErrFlag(FLASH_Type* regBase)
{
    regBase->SR = FLASH_SR_ACCERR_Msk;
}

/*!
 * @brief Clear write protection err flag
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearWriteProtectionErrFlag(FLASH_Type* regBase)
{
    regBase->SR = FLASH_SR_WPVIO_Msk;
}

/*!
 * @brief Clear option byte err flag
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearOptionByteErrFlag(FLASH_Type* regBase)
{
    regBase->SR = FLASH_SR_OPTERR_Msk;
}

/*!
 * @brief Clear all err flag
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearAllErrFlag(FLASH_Type* regBase)
{
    regBase->SR = FLASH_ERROR_FLAG_MASK;
}

#if (CONFIG_FLASH_NUMBER_OF_CACHE == 1U)
/*!
 * @brief Set cache is enable/disable
 *
 * @param[in] regBase: The flash register base address
 * @param[in] enable: enable or disable
 * @return None
 */
static inline void FLASH_REG_SetCacheEnable(FLASH_Type* regBase, bool enable)
{
    regBase->CFGR = (regBase->CFGR & ~FLASH_CFGR_CACHEEN_Msk) | FLASH_CFGR_CACHEEN(enable ? 1U : 0U);
}

/*!
 * @brief Clear cache
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearCache(FLASH_Type* regBase)
{
    regBase->CFGR |= FLASH_CFGR_CACHECLR_Msk;
}

#else
/*!
 * @brief Set program flash cache is enable/disable
 *
 * @param[in] regBase: The flash register base address
 * @param[in] enable: enable or disable
 * @return None
 */
static inline void FLASH_REG_SetProgramFlashCacheEnable(FLASH_Type* regBase, bool enable)
{
    regBase->CFGR = (regBase->CFGR & ~FLASH_CFGR_PCACHEEN_Msk) | FLASH_CFGR_PCACHEEN(enable ? 1U : 0U);
    regBase->CFGR = (regBase->CFGR & ~FLASH_CFGR_PPREEN_Msk) | FLASH_CFGR_PPREEN(enable ? 1U : 0U);
}

/*!
 * @brief Set data flash cache is enable/disable
 *
 * @param[in] regBase: The flash register base address
 * @param[in] enable: enable or disable
 * @return None
 */
static inline void FLASH_REG_SetDataFlashCacheEnable(FLASH_Type* regBase, bool enable)
{
    regBase->CFGR = (regBase->CFGR & ~FLASH_CFGR_DCACHEEN_Msk) | FLASH_CFGR_DCACHEEN(enable ? 1U : 0U);
    regBase->CFGR = (regBase->CFGR & ~FLASH_CFGR_DPREEN_Msk) | FLASH_CFGR_DPREEN(enable ? 1U : 0U);
}

/*!
 * @brief Clear program flash cache
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearProgramFlashCache(FLASH_Type* regBase)
{
    regBase->CFGR |= FLASH_CFGR_PCACHECLR_Msk;
}

/*!
 * @brief Clear data flash cache
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearDataFlashCache(FLASH_Type* regBase)
{
    regBase->CFGR |= FLASH_CFGR_DCACHECLR_Msk;
}
#endif

/*!
 * @brief Set flash read latency
 *
 * @param[in] regBase: The flash register base address
 * @param[in] freq: frequence of flash
 * @return None
 */
static inline void FLASH_REG_SetFlashFrequency(FLASH_Type* regBase, uint16_t freq)
{
    uint32_t tmp;

    tmp = regBase->CFGR;
    tmp = (tmp & ~FLASH_CFGR_FREQ_Msk) | (uint32_t)(freq << FLASH_CFGR_FREQ_Pos);
    regBase->CFGR = tmp;
}

/*!
 * @brief Set flash command
 *
 * @param[in] regBase: The flash register base address
 * @param[in] cmd: flash cmd
 * @return None
 */
static inline void FLASH_REG_SetFlashCmd(FLASH_Type* regBase, uint8_t cmd)
{
    uint32_t tmp;

    cmd = cmd & (FLASH_CCR_CMD_Msk >> FLASH_CCR_CMD_Pos);
    tmp = regBase->CCR;
    tmp = (tmp & ~FLASH_CCR_CMD_Msk) | (uint32_t)(cmd << FLASH_CCR_CMD_Pos);
    regBase->CCR = tmp;
}

/*!
 * @brief Set program length
 *
 * @param[in] regBase: The flash register base address
 * @param[in] length: length of the phrase
 * @return None
 */
static inline void FLASH_REG_SetProgramLengthOfPhrase(FLASH_Type* regBase, uint8_t length)
{
    uint32_t tmp;

    length = length & (FLASH_CCR_PGLEN_Msk >> FLASH_CCR_PGLEN_Pos);
    tmp = regBase->CCR;
    tmp = (tmp & ~FLASH_CCR_PGLEN_Msk) | (uint32_t)(length << FLASH_CCR_PGLEN_Pos);
    regBase->CCR = tmp;
}

/*!
 * @brief Set command address
 *
 * @param[in] regBase: The flash register base address
 * @param[in] address: address
 * @return None
 */
static inline void FLASH_REG_SetCmdAddress(FLASH_Type* regBase, uint32_t address)
{
    regBase->ADDR = address;
}

/*!
 * @brief Write the high word of phrase to register
 *
 * @param[in] regBase: The flash register base address
 * @param[in] data: data to be writing
 * @return None
 */
static inline void FLASH_REG_WriteHighWord(FLASH_Type* regBase, uint32_t data)
{
    regBase->DATAH = data;
}

/*!
 * @brief Write the low word of phrase to register
 *
 * @param[in] regBase: The flash register base address
 * @param[in] data: data to be writing
 * @return None
 */
static inline void FLASH_REG_WriteLowWord(FLASH_Type* regBase, uint32_t data)
{
    regBase->DATAL = data;
}

/*!
 * @brief Clear point of internel buffer
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline void FLASH_REG_ClearPointOfInternelBuffer(FLASH_Type* regBase)
{
    regBase->PDBCR = ((regBase->PDBCR) | (1U << FLASH_PDBCR_FLUSH_Pos));
}

/*!
 * @brief Get option byte error flag
 *
 * @param[in] regBase: The flash register base address
 * @return None
 */
static inline bool FLASH_REG_GetOptonByteErrFlag(FLASH_Type* regBase)
{
    return (bool)((regBase->SR & FLASH_SR_OPTERR_Msk) >> FLASH_SR_OPTERR_Pos);
}

/*!
 * @brief Enable pflash block0 page write protection
 *
 * @param[in] regBase: The flash register base address
 * @param[in] writeProtectRegisterNumber: The program flash write protection register number
 * @param[in] mask: write protection mask
 * @return None
 */
static inline void FLASH_REG_EnablePflash0WriteProtection(FLASH_Type* regBase, uint8_t writeProtectRegisterNumber, uint32_t mask)
{
#if (CONFIG_PFLASH_NUMBER_OF_BLOCK == 2U)
    volatile uint32_t* writeProtectionBaseAddr = (volatile uint32_t*) & (regBase->P0WPR0);
#else
    volatile uint32_t* writeProtectionBaseAddr = (volatile uint32_t*) & (regBase->PWPR0);
#endif
    writeProtectionBaseAddr[writeProtectRegisterNumber] = mask;
}

#if (CONFIG_PFLASH_NUMBER_OF_BLOCK == 2U)
/*!
 * @brief Enable pflash block1 page write protection
 *
 * @param[in] regBase: The flash register base address
 * @param[in] writeProtectRegisterNumber: The program flash write protection register number
 * @param[in] mask: write protection mask
 * @return None
 */
static inline void FLASH_REG_EnablePflash1WriteProtection(FLASH_Type* regBase, uint8_t writeProtectRegisterNumber, uint32_t mask)
{
    volatile uint32_t* writeProtectionBaseAddr = (volatile uint32_t*) & (regBase->P1WPR0);

    writeProtectionBaseAddr[writeProtectRegisterNumber] = mask;
}
#endif

/*!
 * @brief Enable dflash page write protection
 *
 * @param[in] regBase: The flash register base address
 * @param[in] writeProtectRegisterNumber: The data flash write protection register number
 * @param[in] mask: write protection mask
 * @return None
 */
static inline void FLASH_REG_EnableDflashWriteProtection(FLASH_Type* regBase, uint8_t writeProtectRegisterNumber, uint32_t mask)
{
    volatile uint32_t* writeProtectionBaseAddr = (volatile uint32_t*) & (regBase->DWPR0);

    writeProtectionBaseAddr[writeProtectRegisterNumber] = mask;
}

/*!
 * @brief Get chip low uuid(bit0~bit31)
 *
 * @param[in] regBase: The flash register base address
 * @return uuid of bit32~bit63
 */
static inline uint32_t FLASH_REG_GetChipLowUniqueIdentifier(FLASH_Type* regBase)
{
    return regBase->UUID0;
}

/*!
 * @brief Get chip middle low uuid(bit32~bit63)
 *
 * @param[in] regBase: The flash register base address
 * @return uuid of bit32~bit63
 */
static inline uint32_t FLASH_REG_GetChipMidLowUniqueIdentifier(FLASH_Type* regBase)
{
    return regBase->UUID1;
}

/*!
 * @brief Get chip middle high uuid(bit64~bit95)
 *
 * @param[in] regBase: The flash register base address
 * @return uuid of bit64~bit95
 */
static inline uint32_t FLASH_REG_GetChipMidHighUniqueIdentifier(FLASH_Type* regBase)
{
    return regBase->UUID2;
}

/*!
 * @brief Get chip high uuid(bit96~bit127)
 *
 * @param[in] regBase: The flash register base address
 * @return uuid of bit96~bit127
 */
static inline uint32_t FLASH_REG_GetChipHighUniqueIdentifier(FLASH_Type* regBase)
{
    return regBase->UUID3;
}

/*!
 * @brief Get chip name
 *
 * @param[in] regBase: The flash register base address
 * @return chip name model
 */
static inline uint32_t FLASH_REG_GetChipName(FLASH_Type* regBase)
{
    return regBase->CMNR;
}

/*!
 * @brief Get chip pflash size information
 *
 * @param[in] regBase: The flash register base address
 * @return pflash size information
 */
static inline uint16_t FLASH_REG_GetChipPflashSizeInfo(FLASH_Type* regBase)
{
    return (uint16_t)((regBase->CMIR & FLASH_CMIR_FSIZE_Msk) >> FLASH_CMIR_FSIZE_Pos);
}

/*!
 * @brief Get chip sram size information
 *
 * @param[in] regBase: The flash register base address
 * @return sram size information
 */
static inline uint16_t FLASH_REG_GetChipSramSizeInfo(FLASH_Type* regBase)
{
    return (uint16_t)((regBase->CMIR & FLASH_CMIR_SSIZE_Msk) >> FLASH_CMIR_SSIZE_Pos);
}

/*!
 * @brief Get chip pins information
 *
 * @param[in] regBase: The flash register base address
 * @return pins information
 */
static inline uint16_t FLASH_REG_GetChipPinInfo(FLASH_Type* regBase)
{
    return (regBase->CPIR & 0xFFFF);
}

/*!
 * @brief Get chip Bandgap offset
 *
 * @param[in] regBase: The flash register base address
 * @return Bandgap offset
 */
static inline int16_t FLASH_REG_GetBandgapOffset(FLASH_Type* regBase)
{
    int16_t bandgapOffset;

#if (CONFIG_PFLASH_NUMBER_OF_BLOCK == 2U)
    bandgapOffset = (int16_t)((regBase->CMNR & FLASH_CMNR_BGOF_Msk) >> FLASH_CMNR_BGOF_Pos);
#else
    uint16_t tmp;

    tmp = (uint16_t)((regBase->CPIR & FLASH_CPIR_BGOF_Msk) >> FLASH_CPIR_BGOF_Pos);

    if (tmp > 2047U) {
        bandgapOffset = tmp - 4096U;
    } else {
        bandgapOffset = tmp;
    }
#endif

    return bandgapOffset;
}

#if defined(__cplusplus)
}
#endif

#endif /*FLASH_REG_ACCESS_H*/

/*******EOF********************************************************************/
